(1) Field of the Invention
The present invention relates to a processor apparatus and a multithread processor apparatus which include a plurality of processors which execute programs for the processor apparatus by switching the programs, and relates particularly to a processor apparatus and a multithread processor which share a hardware resource between a plurality of processors.
(2) Description of the Related Art
Along with rapid development of digital technology and audio-visual compression and decompression techniques in recent years, higher performance is expected of a processor incorporated in a digital television, a digital video recorder (DVD recorder and so on), a cellular phone, and a video sound device (camcoder and so on).
For example, a multithread processor is known as a processor which realizes high performance (for example, see Patent Reference 1: Japanese Unexamined Patent Application Publication 2006-302261). This multithread processor can improve processing efficiency by simultaneously executing a plurality of threads. In addition, the multithread processor can improve, in executing the threads, area efficiency of the processor as compared to the case of providing a plurality of processors independently.
On the other hand, such a processor performs: control-related host processing which does not require real-timeness; and media processing such as compression and decompression which require real-timeness.
For example, an audio-visual processing integrated circuit described in Patent Reference 2 (International Publication 2005/096168) includes: a microcontroller block for performing host processing and a media processing block for performing media processing.
In addition, there is a technique called lazy context switch as a technique of minimizing context switching of a floating point number processing unit (FPU). According to the technique, in execution context, save and restore of FPU context is delayed until execution of an FPU instruction is required. In other words, asynchronously with save and restore of context of an ordinary processor, context switching of the FPU is executed, so as to suppress the frequency to a minimum.
Since the FPU includes a number of registers, and since some programs on which time-division multiplexing is performed do not use the FPU, the above method is intended to reduce overhead for save and restore of the FPU context.